Intel technologies Looking for Sever content development engineer at Shanghai, China Full Time

 Job Details:

Job Description: 

The world in Data center is changing with increasing complexity on platform design and customer use cases. Fast response to platform level bugs become one of the major challenges for on time PRQ and customer satisfaction. DCG is looking for a senior technical SysDebug Engineer to drive velocity in response to bugs, and improve product quality.

As senior system debug engineer, you will be responsible for driving active bugs and resolution of the top platform issues across the virtual team.

Your responsibilities will include but not be limited to:

• Debug and drive sighting for closure by proactive physical work and/or coordination with relevant stakeholders on defect duplication and investigation.
• Bring your learning from issues back to team, open mind to improve technical solutions to validate feature functionality and system stability for a high-quality product delivery.
• Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes
• Contribute to improve triage and execution efficiency

As a lead debugging engineer, you will guide the debug virtual team’s technical efforts and priorities. You will be the owner and driver of active debug and resolution of the top platform issues that are prioritized by the project validation and program leads.

You will leverage your background and experience in HW/SW/FW to identify causes and points of failure, as well as recommend potential workarounds or solutions. You may also be asked to engage in initial triage and prioritization of issues as they are discovered by validation engineers or other teams. You will engage on hands-on technical debug on datacenter systems in the lab as well as collaborate with ingredient debug leads and full-chip sys-debug leads as required. You will coordinate and collaborate with other team members and platform sys-debug engineers and will seek to drive board/software and system issues resolution. Your role may also include driving defect updates and publishing key metrics/indicators. You may drive key Task Force meetings as required. You might published BKMs on your debug findings for other teams to leverage. You will be part of Platform Execution and Validation (PEV) team in Data Center Engineering and Architecture group and will lead efforts for Xeon-SP platform debug. This role typically requires a broad understanding of multiple system areas (HW/SW/FW) and requires interfacing with Architecture, Design, Software engineering, pre/post silicon validation, platform/ingredient teams and providing feedback for future on-die debug features. Your efforts will be leveraged as well to improve future designs

Qualifications

BS or MS in Electrical Engineering, Computer Science, Computer Engineering, or other related field
Proven technical acumen in system architecture – HW-FW-SW as a whole.
hands on development experience in UEFI FW, Linux kernel and/or Windows
Previous validation/debug experience is a must
Platform Debug, Stability, MTBF, Validation methodologies
You must be able to work in a lab environment
Proven history of keenly investigating, diagnosing, resolving complex technical and organizational challenges
Recognized for the following key attributes: self-starter, self-motivator, advanced problem solver and passion for continuous improvements

Inside this Business GroupThe Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world’s most critical computing platforms which fuel Intel’s most important business and solve the world’s most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.htmlWorking ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.