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Google Looking for ASIC Engineer, Static Timing Analysis at Bangalore, Karnataka, India Full Time
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- 8 years of experience with Static Timing Analyses, sign-off corner definitions, process margining, and set up of frequency goals with technology scaling and platform development kit (PDK) changes.
- Experience with liberty timing models and Static Timing Analysis tools (e.g., Primetime, Tempus).
Preferred qualifications:
- Understanding of the basics of circuit and standard cell design.
- Understanding of the fundamentals of computer architecture.
- Understanding of synthesis, PnR, and power performance area (PPA) optimizations.
About the job
Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
As an ASIC Static Timing Analysis Engineer, you will be part of Google’s Silicon team, developing hardware and software to enable Google’s continuous innovations in working with Application Specific Integrated Circuits (ASIC).
You will drive the complete sign-off timing convergence for designs including deciding the initial timing goals, setting up the timing analysis flows and methodology, and working with the implementation engineers to hit the timing goals.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
Responsibilities
- Drive the sign-off timing convergence for high performance designs.
- Set up timing constraints, defining the overall static timing analysis (STA) methodology.
- Set up the STA infrastructure and sign-off convergence flows.
- Work closely with block owners throughout the project for sign-off timing convergence.