Intel Looking for Packaging Research and Development External Technology Integration Engineer at Phoenix, AZ Full Time

Job Description

This is an entry level position and compensation will be given accordingly.

This position is within ATTD Technology Integration Department and specifically within External Technology Integration team.

Microelectronic Packaging Engineers provide project management, package/Si design/development and sustaining support for integrated circuit or semiconductor assemblies, various other electronic components and/or completed units.

Responsible for the thermal/mechanical/electrical design, analysis, and development of electronic packages.

Defines overall package performance and specification and realizes technology certification through layout design and test vehicle design.

Conducts tests and research on basic materials and properties.

Establishes material specifications for contract assemblers and raw material vendors and interfaces with Quality Assurance and Purchasing regarding material quality and vendor performance.

Provides consultation concerning packaging problems and improvements in the packaging process.

Responds to customer/client requests or events as they occur.

Develops solutions to problems utilizing formal education and judgment.

The candidate should also exhibit the following behavioral traits/skills:

• Communication skills across Internal and external stakeholders and planning/prioritization skills for project success and transferring technology to Ramp organization.
• Willingness to lead and influence both external and internal teams will be critical.
• Willingness to work independently without much supervision.
• Technical problem solving skills in a matrixed team environment and assembly integration skills.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

• Must possess a Master’s Degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 6+ months of experience in related field and/or PHD Degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 1+ years of experience in related field.

Preferred Qualifications:

• 3+ months of experience in structure property relationships and fundamental materials characterization techniques.
• 3+ months of experience in Si/Semiconductor Fabrication processing and Microelectronic Packaging Assembly Processes and Si processing in Fab/Clean Room Environment.
• 3+ months of experience in Si backend fab processes, Memory/packaging technology, memory silicon/package interactions, silicon and/or package debug and verifications.
• 3+ months of experience with silicon design, SI parameters and power characterization and high speed IO signaling.

Inside this Business Group

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art – from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.