Intel technologies
Job Description
As an STA design engineer candidate will be responsible for timing closure and signoff of FPGA/SoC and Subsystem timing. Candidate will be involved in static timing analysis, providing/deriving interface timing constraints to partitions and doing final timing signoff. Candidate will also work closely with design and architecture team for timing convergence analysis and will also work with physical design team for timing closure
Qualifications
Experience in Static timing analysis , and industry standard EDA tools like Primetime/PTPX
– Good understanding of timing constraints, clocking, PVT etc
– Should have tapeout experience including in latest technology 10nm or lower
– BE/MS/Phd in Electronics/Electrical Engineering with 2+ Years’ experience in physical design and timing closure/signoff
-Candidate should be strong in communication, problem solving and analytical skill
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera’s industry-leading FPGA technology and customer support with Intel’s world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.